Sl.No
Name of the Faculty
Details of IEP / Guest Lecture
Venue
Period
1
Dr.S.Allin Christe
Dr.M.Santhanalakshmi
Mrs.A.Uma
Dr.K.Vasanthamani
Mr.K.R.Radhakrishnan
Two Days Online Workshop on Modeling of SoC using Xilinx Vivado Tools
Dept of ECE, PSG CT
(Online)
18-19, December 2020
2
Mr.K.R.Radhakrishnan
Design on FPGA Instruction Enhancement Program(IEP)
National Institute of Electronics & Information Technology, Calicut
(Online)
November & December 2020
3
Dr.K.Rajalakshmi
Quantum Computing
EICT Academies of NIT Patna, MNIT Jaipur, IIIT DM Jabalpur (Online)
24-29, August 2020
4
Dr.R.Venkateswari
Programmable System On Chip
Dept of ECE, PSGTECH
(Online)
26 August 2020
5
Dr.K.Rajalakshmi
AI/ML Techniques in VLSI Design
Department of Electronics and Communication Engineering, Department of Electronics and Telecommunication Engineering and Department of Medical Electronics, Ramaiah Institute of Technology, Bangalore  (Online)
20- 25, July 2020
6
Dr.M.Santhanalakshmi
Mrs.A.Uma
Five Day  on-line course on VLSI Physical Design using Cadence Innovus tool
Dept. of ECE,St. Joseph's College of Engineering (Online)
20-24, July 2020
7
Dr.R.Venkateswari
Mrs.P.Prabavthi
Functional verification of complex SOC Desings using UVM
Dept of ECE, PSG Institute of Technology and applied research (Online)
20 July 2020
8
Dr.K.Rajalakshmi
VLSI Design-Timing Fundamental
NIELIT CALICUT
(Online)
20 May 2020
9
Mrs.N.Devipriya
Introduction to System Verilog and UVM
An Initiative by Excel VLSI Technologies Pvt Ltd and Entuple Technologies Pvt. Ltd (Online)
03 April 2020
10
Dr.S.Hema Chitra
One-week Faculty Development Programme on, "VLSI Chip Design Hands-on using Open Source EDA"
Electronics & ICT Academies at IIT Guwahati, PDPM IIIT DM Jabalpur, NIT Patna, MNIT Jaipur, Supported by Ministry of Electronics and Information Technology (MeitY) and Dept of ECE, PSG CT
16-20, December 2019
11
Dr.K.Rajalakshmi
Faculty Development Program on ARM architecture and System on Chip Design
 Ministry of Electronics & Information Technology (MeitY) Government of India
01-03, December 2019
12
Mrs.S.Shanthi Rekha
(Research Scholar)
A two Day International Hands-on Workshop on "Machine Learning for Engineers"
Department of EEE, PSG College of Technology in associaition with KcloudLogic Inc., Texas USA
12-13, April 2019
13
Dr.K.Rajalakshmi
Modelling & Deployment onto an SoC using MATLAB &Simulink
CIT, TLC
23-26, March 2019
14
Mr.S.Udaya Shankar
The 28th IEEE Asian Test Symposium (ATS’19)
The LaLiT Great Eastern Hotel, Kolkata, West Bengal, India
10-13, December 2019
15
Mr.S.Udaya Shankar
Hands on Workshop on FPGA Based Embedded System Design
Centre of Excellence in VLSI System Design, Department of ECE, PSG College of Technology
10-11, October 2019
16
Mr.S.Udaya Shankar
IEP Course on Chip tapeout
IISc Bangalore
24-28, June 2019
17
Dr.P.Kalpana
Design, develop and deliver on line course-Hands on approach in association with E &ICT, NIT Warangal
CIT,  Coimbatore
19-21, June 2019
18
Dr.P.Saravanan
Mr.Udaya Shankar
22nd International symposium on VLSI Design and Test
TCE, Madurai
28-30, June 2018
19
Mrs.S.Shanthi Rekha
(Research Scholar)
Practical Side Channel Attacks
Payatu Technologies, Goa
27-28, February 2019
20
Dr.S.Hema Chitra
Dr.G.Umamaheswari
Dr.L.Thulasimani
Dr.S.Mohandass
Mr.T.Venkatachalam
Mrs.S.Radha Rani
MeitY Electronics & ICT Academy IIT Guwahati Sponsored One Week Faculty Development Programme on "VLSI Design at Deep Submicron Node" in association with Semiconductor Laboratory, Chandigarh.
Dept of ECE, PSG CT
04-08,  February 2019
21
Dr.K.Rajalakshmi
Dr.P.Saravanan
Faculty Development Programme on Xilinx SoC: FPGA based Design
NIT Trichy
30 July - 3 August 2018
22
Mr.S.Udaya shankar
22nd International Symposium on VLSI Design and Test (VDAT – 2018)
Dept of ECE, Thiagarajar College of Engineering, Madurai
28-30, June 2018
23
Mrs.S.Shanthi Rekha
(Research Scholar)
22nd International Symposium on VLSI Design and Test (VDAT – 2018)
Dept of ECE,Thiagarajar College of Engineering,Madurai
28-30, June 2018
24
Mrs.A.Uma
4th IEEE International Conference on Devices,Circuits and Systems(ICDCS'18)
Karunya Institute of Technology and Sciences, Coimbatore
16-17, March 2018
25
Mr.S.Udaya shankar
Instruction Enhancement Program on High Level Design to Silicon under SMDP-C2SD, MeitY
Dept of ECE, Indian Institute of Technology, Roorkee
24-27, February 2018
26
Mrs.S.Shanthi Rekha
Mr.R.Navaneetha Krishnan
Mrs.A.Deepa (Research Scholar)
System Design Using Vivado Design Suite and Zynq-7000 SoC
Dept of ECE, PSG College of Technology
27-28, October 2017
27
Mrs.S.Shanthi Rekha
(Research Scholar)
21stInternational Symposium on VLSI Design and Test (VDAT – 2018)
Dept of ECE, Indian Institute of Technology, Roorkee
29 June-2 July 2017
28
Dr.S.Subha Rani
Dr.V.K.Manoharan
Dr.V.Krishnaveni
Dr.G.Umamaheswari
Dr.M.Santhanalakshmi
Dr.S.Hema Chitra
Dr.L.Thulasimani
Dr.K.V.Aunsuya
Dr.A.Kannammal
Dr.C.Ramya
Mr.T.Venkatachalam
Dr.S.Mohandass
Mrs.R.Usha Rani
Mr.S.Udaya shankar
Two Week ISTE-STTP on
CMOS, Mixed Signal and Radio Frequency VLSI Design
Dept of ECE, PSG CT. Sponsored by ICT (MHRD), IIT Kharagpur
30 January-4 February 2017
29
Dr.M.Santhanalakshmi
Mrs.A.Uma
Synopsys EDA Tools Training Programm, under SMDP-C2SD, MeitY 
Dept of ECE, National Institute of Technology, Tiruchirappalli
5-10, January 2017
30
Dr.K.Rajalakshmi
Mrs.M.Swathi Priya
Mr.S.Udaya Shankar
Mr.P.Madhan Kumar
Mrs.S.Shanthi Rekha
(Research Scholar)
Cadence Tools Training Programme
Dept of ECE,PSG CT & SMDP-C2SD, MeitY 
23-25, January 2017
31
Dr.K.Rajalakshmi
Dr.S.Hema Chitra
Ms.C.Sathyashree Sowbarnica
Mrs.M.Swathi Priya
Mr.S.Udaya Shankar
Mr.P.Madhan Kumar
Mrs.S.Shanthi Rekha
(Research Scholar)
Mentor Graphics Tool Training Programme
Dept of ECE,PSG CT &
SMDP-C2SD, MeitY 
16-19, January 2017
32
Dr.K.Rajalakshmi
Workshop on Silvaco TCAD Device Simulation
PSG Institute of Advanced
Studies
July 2017
33
Mrs.M.Swathi Priya
Ms.C.Sathyashree Sowbarnica
Training Program on Xilinx FPGA Tools, under SMDP-C2SD, MeitY 
Dept of Electronics Systems Engineering and Electrical Communication Engineering, IISc Bangalore
12-21, December 2016
34
Dr.P.Saravanan
Practical Biological Signal Analysis, GIAN(MHRD)
National Institute of Technology, Karnataka,Surathkal
21-25, November 2016
35
Mr.S.Udaya shankar
Testing  and Design-for-Testability for Digital Integrated Circuits,GIAN(MHRD)
Indian Institute of Engineering Science and Technology,Shibur
25 July-05 August 2016
36
Dr.K.Rajalakshmi
One week TEQIP-II sponsored FDP on Multiscale Modelling and Simulation of Nanoelectronics  Devices-A Research Perspective
TEQIP II, Dept of ECE, PSG CT
25-31, July 2016
37
Mrs.M.Swathi Priya
Instruction Education Programme on Chip Tape Out
IISc, Bangalore
04-08, July 2016
38
Mr.K.R.Radha Krishnan
Mr.P.Madhan Kumar
Synopsys University Connect Workshop
Synopsys, Bangalore
20-21, June 2016
39
Dr.S.Subha Rani
Mr.K.R.Radha Krishnan
2nd IEEE International Conference on VLSI Systems,Architecture Technology and Applications,
VLSI SATA 2016
Amrita Vishwa Vidyapeetham Bengaluru
10-12, January 2016
40
Dr.K.Rajalakshmi
Mrs.A.Uma
International Conference on Microelectronics Computing & Communication Systems, (MCCS – 2015)
Indian Society for VLSI Eductaion, Ranchi
14-15, November 2015

 

Instruction Enhancement Programme/Guest Lecture Attended By Faculty


Sl.No
Name of the Faculty
Details of IEP / Guest Lecture
Venue
   1
Dr.P.Kalpana
Mrs.N.Srividhya
VLSI Subsystem Design
CEERI,Pilani
   2
Dr.J.Ramesh
Mr.R.Krishnakumar
Semiconductor Device Modelling
IIT,Kanpur
   3
Dr.J.Ramesh
Mr.R.RanjiniKumar
VLSI Fabrication and Technology
IIT Kharagpur
   4
Mrs.T.Hamsapriya
Dr.T.Kesavamurthy
Advanced System Architecture
IIT Khargpur
   5
Mrs.N.Srividhya
Mrs.Bibney Mary Abraham
Vendor Training Programme on Synopsys Tools,Conducted
IISc,Bangalore.
   6
Dr.J.Ramesh
High Level VLSI Design
CEERI,Pilani
   7  
Ms.Tharani
Ms.S.Hema Chitra
Introduction to Digital VLSI Circuit Simulation and Timing Analysis Physical Design Lab
IISC,Bangalore
   8
Dr.J.Ramesh
Mr.P.Ramanathan
VLSI System and Architectures
CEERI,Pilani
   9
Mr.P.Ramanathan
Mr.M.Veera Raghavalu
VLSI Interconnect Analysis
IIT Kharagpur
  10
Mr.P.Ramanathan
Mr.P.Vijayakumar
Hardware Software Co-Design Lab
IIT,Delhi
  11
Mr.M.Veera Raghavalu
Mr.P.Vijayakumar
Low Power Design Techniques
IISc,Bangalore.
  12
Mr.A.R.Abdul Rajak
Reconfigurable Computing System Hardware Design FPGA Based Design Lab
IIT,Mumbai.
  13
Mr.N.Nandhakumar 
Mr.N.Deepakkumar
Design Finishing for Chip Tape Out
IIT,Kanpur
  14
Dr.T.Kesavamurthy
Mr.K.R.Radhakrishnan
Analog and Mixed Signal Design
IIT,Madras
  15
Dr.P.Kalpana 
Mr.K.R.Radhakrishnan
VLSI Aspects on Biomedical Engineering
IIT Kharagpur
  16
Mrs.M.Santhanalakshmi
Mrs.N.M.Sivamangai
Low Power and Low Noise OP-Amp
IIT Delhi
  17
Mrs.M.Santhanalakshmi
Mrs.N.M.Sivamangai
Lowpower low noise op-amp design
New Delhi
  18
Mrs.K.Rajalakshmi
IEP on 'Chip Tape out'
NIT,Trichy
  19
Mrs.K.Rajalakshmi
Low  power VLSI Design
IIT,Kharagpur
  20
Mr.P.Ramanathan
IEP Programme on “Analog IC design
IIT,Kharagpur
  21
Ms.K.Rajalakshmi
Ms.A.Uma
VLSI DSP based design
IIT,Kharagpur
  22
Mrs.K.Rajalakshmi
Mrs.N.M.Sivamangai
“Technology Cad”
IIT Kharagpur
  23
Mrs.K.Rajalakshmi
Mrs.N.M.Sivamangai
IEP course on Technology CAD
IIT Kharagpur
  24
Mr.P.Ramanathan
Mr.P.Sampath
Instruction Enhancement Program(IEP) on “Mixed Signal VLSI Design”, Organized by IIT Bombay, Mumbai
Goa Engineering College, Goa.
  25
Mr.U.Saravanakumar
IEP Course on System Modeling using system C/System verilog VHDL
Thapar University, Patiala
  26
Mrs.K.Rajalakshmi
IEP on Algorithms to Architectures
IIT, Madras
  27
Mr.P.Saravanan
Mr.U.Saravanakumar
Low Power High-Speed Digital Sub System Design: SPEC to CHIPS
IIT,Kharagpur
  28
Dr.P.Kalpana
Mrs.C.Lakshmi Deepika
Cadence Design Tools and Flow Training
IIT, Madras
  29
Mrs.k.Rajalakshmi
Mr.P.Saravanan
Semiconductor Memory Design and Test
MNIT,Jaipur
  30
Mr.P.Saravanan
Chip Integration and Tapeout Issues
NIT,Trichy
  31
Dr.P.Kalpana
Mrs.S.AllinChriste
Curriculum Development Workstop on VLSI Design
IIT,Bombay

 

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