International Symposium

ShanthiRekha, S., Saravanan, P,” Threshold Implementation of a Low-Cost CLEFIA-128 Cipher for Power Analysis Attack Resistance”,Proceedings of the 23rd International Symposium on VLSI Design and Test(VDAT),Indore,India,pp:272-285,July 2019  (SCOPUS indexed) DOI: https://doi.org/10.1007/978-981-32-9767-8_24

 

Saravanan.P,Mehtre B.M,” A Novel Approach to Detect Hardware Malware Using Hamming Weight Model and One Class Support Vector Machine”, Communications in Computer and Information Science, 2019, 892, pp. 159–172, International Symposium on VLSI Design and Test – 2019, DOI:https://doi.org/10.1007/978-981-13-5950-7_14

 

ShanthiRekha, S., Saravanan, P,” Low Cost Circuit Level Implementation of PRESENT-80 S-BOX”,Proceedings of 21st International Symposium on VLSI Design and Test,Springer June 2017,pp:354-362,2017 (SCOPUS indexed) DOI:https://doi.org/10.1007/978-981-10-7470-7_35

 

M. Santhanalakshmi and K. Yasoda, "Verilog-A implementation of energy-efficient SAR ADCs for biomedical application," 2015 19th International Symposium on VLSI Design and Test, 2015, pp. 1-6,2015, DOI: 10.1109/ISVDAT.2015.7208139

 

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